Product category: Analogue and Mixed Signal ICs
News Release from: National Semiconductor | Subject: LMH1982
Edited by the Electronicstalk Editorial Team on 15 April 2008
Video clock generator ensures SMPTE
compliance
The LMH1982 can replace discrete and FPGA phase-lock loops with multiple voltage controlled crystal oscillators, while offering low total power dissipation of 250mW.
A new multirate video clock generator with genlock from National Semiconductor Corp delivers high-definition (HD) clock output jitter as low as 40ps peak-to-peak The LMH1982 provides reference clocks for video A/D convertors, D/A convertors and FPGA transceivers
This article was originally published on Electronicstalk on 5 Jan 2001 at 8.00am (UK)
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These reference clocks ensure a system's 3Gbit/s, HD and standard-definition SDI output jitter is in compliance with SMPTE video standards.
The LMH1982's high-integration and small 5 x 5mm package size simplifies the design of video cameras, digital recorders and a wide range of video editing and post-production equipment.
The LMH1982 can replace discrete and FPGA phase-lock loops with multiple voltage controlled crystal oscillators (VCXOs), while offering low total power dissipation of 250mW.
Only one external VCXO is required to operate the LMH1982.
The device can generate two simultaneous SD and HD output clocks and an output top of frame timing pulse.
In genlock mode, these output signals can be phase-locked to H and V sync signals applied to either of the reference ports.
The LMH1982's low-jitter output clocks are capable of driving FPGA serialisers without the need for additional clock cleansing.
The device's integrated PLLs can synchronise the output clocks to an analogue timing reference from National's LMH1981 multiformat video sync separator or a digital timing reference from an SDI deserialiser.
The use of an external loop filter offers additional configurability to optimise rejection of reference input timing jitter.
Offered in a small, space-saving 32-pin LLP package, National's LMH1982 3G/HD/SD multirate video clock generator provides two simultaneous low-voltage differential signalling (LVDS) output clocks with selectable frequencies for SD (27 or 67.5MHz) and HD (74.25, 74.25/1.001, 148.5 or 148.5/1.001MHz) resolutions.
The LMH1982 supports NTSC/525i, Pal/625i, 525p, 625p, 720p, 1080i and 1080p video timing.
An I2C compatible bus interface is included for programming device registers and reading device status.
The LMH1982 operates from 3.3 and 2.5V supplies.
Samples of the LMH1982 are available now, with high-volume quantities scheduled to be available the end of May 2008.
The LMH1982 is priced at US $24.95 each in 100-unit quantities.
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