Product category: Analogue and Mixed Signal ICs
News Release from: National Semiconductor | Subject: ADC083000 etc
Edited by the Electronicstalk Editorial Team on 07 June 2006
Speedy convertors cope with bursting
data
A new 8bit ultra-high-speed analogue-to-digital convertor family claims a new performance standard for sampling speed, delivering 6Gsample/s data capture at 3.6W.
A new 8bit ultra-high-speed analogue-to-digital convertor (ADC) family from National Semiconductor claims a new performance standard for sampling speed, delivering 6Gsample/s data capture at 3.6W The single ADC083000 ADC operates at 3Gsample/s and can be interleaved in a pair for 6Gsample/s data capture without any additional clock adjustment circuitry
This article was originally published on Electronicstalk on 5 Jan 2001 at 8.00am (UK)
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A full-power input bandwidth of 3GHz, superior dynamic performance and low power consumption of 1.8W complete the list of best-in-class features.
In addition, National is introducing two other ADCs, the ADC082500, capable of sampling speeds up to 2.5Gsample/s, and the ADC08B3000.
The ADC083000 and ADC082500 are well suited to communications and test and measurement applications.
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The ADC08B3000, which combines 3Gsample/s sampling and a programmable 4Kbyte memory buffer, is ideal for ranging applications such as radar and lidar (light detecting and ranging), where the data are captured in bursts and transferred at lower, more manageable datarates.
These ADCs feature a unique folding/interpolating architecture.
Folding reduces the number of comparators, and interpolation greatly reduces the number of front-end amplifiers required, saving power and reducing the load on the input signal.
National fabricates the ADC family on its proprietary, analogue-optimised 0.18-micron CMOS process technology in its state-of-the-art South Portland, Maine facility.
The ADC083000 can digitise an input signal to 8bit at sampling speeds up to 3Gsample/s.
It provides a wide, 3GHz, full-power bandwidth, allowing for sampling of wideband signals even in the second Nyquist band.
It has an adjustable sampling clock phase that allows designers to interleave multiple ADCs on a board without using costly, external clock-adjustment circuits.
The convertor offers 1:4 demultiplexed outputs standard for simplified data capture or a new 1:2 output mode for reduced pin count when interfacing with an ASIC or FPGA.
Both of these output modes use LVDS.
The ADC083000 also has test patterns on the outputs for easier system design and test.
A three-wire serial bus controls these features, as well as on-chip functionality, and gain and offset fine-tuning for the input.
The ADC083000 typically achieves 7.0 effective number of bits (ENOB), 44dB signal-to-noise ratio (SNR) and 54dB spurious free dynamic range (SFDR) when sampling a 750MHz input at 3Gsample/s.
The ADC082500 is a 2.5Gsample/s version of the ADC083000.
The ADC08B3000's integrated memory buffer reduces system cost and design complexity, providing National's customers with an efficient architecture for their systems.
The ADC08B3000 samples one input at speeds up to 3Gsample/s and stores the data in a 4Kbyte first in, first out (FIFO) memory buffer.
One or two 8bit CMOS output buses then transfer data from the FIFO out of the ADC to the processor at slower rates of up to 400Mbyte/s.
The ADC08B3000 is an innovative systems approach to data acquisition for applications where signal pulses need to be captured at gigasample speeds while processed at much slower rates.
The ADC08B3000 has the same performance specifications as the ADC083000.
All three ADCs will be available in January 2007.
Samples are available now.
The ADC083000 is priced at $523 in 1000-unit quantities.
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