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Product category: Standard Logic Devices
News Release from: National Semiconductor | Subject: DS90LV804
Edited by the Electronicstalk Editorial Team on 16 March 2006

Four-channel LVDS buffer runs up to
800Mbit/s

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National Semiconductor has introduced a very small, low-jitter signal integrity buffer to its industry-leading portfolio of low-voltage differential signalling (LVDS) products.

National Semiconductor has introduced a very small, low-jitter signal integrity buffer to its industry-leading portfolio of low-voltage differential signalling (LVDS) products National's DS90LV804, a four-channel LVDS buffer, operates up to 800Mbit/s, covering the broad range of datarates typically employed in mainstream multicard or multibox designs

The device features 15kV of ESD protection for maximum isolation of FPGAs, ASICs and other onboard components.

It is well-suited for delivering clean LVDS signals across cables and backplanes found in a wide variety of electronic systems, including telecom, datacomms, industrial, medical, automotive and office imaging applications.

The DS90LV804 drives up to four LVDS clock and/or data channels over common backplanes or simple cable configurations.

The wide differential input range easily interfaces to LVDS, low-voltage positive emitter-coupled logic (LVPECL) or current mode logic (CML) input levels.

The output levels are fully LVDS-compliant.

The DS90LV804 is an ideal signal integrity driver for both clock and data signals.

The quad configuration has matched output drivers for a typical minimal channel-to-channel skew of 50ps.

onboard terminations help reduce jitter by terminating the signal path at the transmit output and at the receiver input.

Total typical jitter is a very low 30ps.

When high-speed signals pass through cables or PC boards, the signal integrity is highly dependent on the datarate, cable type, length, termination scheme and environmental noise.

In order to maximise signal integrity, National's DS90LV804 has both internal input and output, or source, termination resistors to eliminate these extra components from the board and to guarantee the lowest possible return loss during data transmission.

This is especially significant when driving signals at longer distances.

The DS90LV804, available in a small 32-pin LLP package that measures 5 x 5 x 0.80mm, allows the buffer to be used in space-constrained applications.

Lead-free package options are also available.

In power-sensitive applications, the power-down mode can minimise power consumption when all four channels of a single device are not active, as in redundancy applications.

An output enable pin is provided, which allows the user to place the LVDS outputs and internal biasing generators in a tristate, low-power mode.

Available now, the DS90LV804 costs $2.95 each in quantities of 1000.

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