Product category: VMEbus Boards and Assemblies
News Release from: Motorola Embedded Communications Computing Group
Edited by the Electronicstalk Editorial Team on 24 January 2002
Renaissance to breathe
new life into VMEbus
Motorola Computer Group has unveiled its strategy to dramatically increase the capability and performance of the VMEbus
Motorola Computer Group has unveiled its strategy to dramatically increase the capability and performance of the VMEbus for key applications in markets such as defence and aerospace, medical and industrial automation. Motorola, one of the original creators of VMEbus 21 years ago, is calling this new initiative the VME Renaissance, a period of innovation and performance improvement that will help to deliver significant enhancements over the coming years, while continuing to help protect customers' hardware and software investments.
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The VME Renaissance will begin with Motorola's initiative to launch a PCI-X to 2eSST VMEbus bridge codenamed "Tempe".
The Tempe chip will implement the 2eSST protocol, which was established as an industry standard by the VMEbus International Trade Association (VITA).
The protocol allows the VMEbus to run at a bandwidth of 320Mbyte/s, giving the bus an 8x performance increase over VME64's practical speed.
Supporting existing VMEbus protocols, the chip is designed to be backwards compatible with existing VMEbus cards, enabling existing cards and new Tempe-enabled cards to work together in the same system.
The Tempe chip has a PCI-X bus host-side interface running at up to 133MHz, which provides transfer rates of up to 1Gbyte/s.
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This is a 2x improvement over a 64bit/66MHz PCI interface.
"Motorola's new VMEbus developments are quite exciting.
Its approach recognises the need to serve VME's large, established user base, as well as the requirement to enhance the capabilities of VME architecture so that it can satisfy rapidly accelerating performance demands", said Eric Gulliksen, analyst from Venture Developers Corporation.
"In 2001, the VME merchant board market in the USA alone was estimated to be $880 million.
We expect this new technology may not only ensure the continued viability of VME, but stimulate healthy growth rates for the entire VME market for the next several years".
"The life extension of any commercial architecture that is currently being used in military systems can only be considered as positive", said Jerry Braun, commercial technology insertion project engineer, US Naval Service Warfare Centre (NSWC), Crane Division.
"Any architecture enhancement that provides backwards compatibility while increasing bandwidth and decreasing latency provides the military with tremendous flexibility when refreshing and inserting new technology into legacy equipment".
"Our complete commitment to moving the VMEbus technology forward is based on helping our current and future customers compete in their respective markets", said Jeffrey Harris, director of research and software architecture, Motorola Computer Group.
"As reinforced by the support of key board suppliers and OEMs, it is evident that the next few years will be an exciting era of intense technology infusion and intellectual activity with respect to VMEbus".
Accompanying the Tempe chip is a new set of bus transceivers from Texas Instruments.
These new transceivers, coupled with Motorola's Tempe chip, will allow Tempe-enabled boards to achieve 2eSST speeds in existing VMEbus backplanes.
"Texas Instruments is looking forward to participating in the VME Renaissance with Motorola to meet the needs of the VME market", said David Hoover, worldwide marketing manager for Texas Instruments.
"We are excited about providing a product that improves signal integrity over backplanes without sacrificing high-speed operation.
The TI SN74VMEH22501 solution, chosen by Motorola, provides legacy VMEbus users and current logic backplane designers with up to an 8x improvement in overall system performance".
Ray Alderman, executive director, VITA said, "Completely revamping an infrastructure can be extremely expensive and time consuming, so VMEbus developers such as Motorola are always looking for ways to help customers protect the huge investment they've already made by extending the life of their VMEbus technology.
By using the Tempe chip, VITA has no doubt that Motorola will succeed with this new VMEbus Renaissance, bringing a new buzz and injecting a level of excitement into the VME community that will extend far into the future".
ASML, one of the largest semiconductor equipment manufacturers in the world and a key customer of Motorola, is very pleased that Motorola and its industry partners have announced the VME Renaissance initiative.
"The planned programme of technology enhancements should significantly improve the capabilities of VMEbus in high-end control applications", said Theo van den Akker, Manager Electronic Development, of ASML.
"With the support of leading VMEbus manufacturers the program will extend the life of VMEbus and help to protect our investment in VMEbus technology".
Another major initiative in the VME Renaissance will be a proposal to the VITA Standards Organisation (VSO) to create a standard for switched serial interconnects on the VMEbus.
A number of key industry players intend to join Motorola to form a special interest group (SIG) that will cosponsor this proposal.
The major elements in the proposal will: add a switched serial interconnect to VMEbus coincident with the VMEbus parallel bus; employ standard open technology for the switched serial links; accommodate multiple standard open technologies for the links, but not necessarily at the same time; maintain backward compatibility with the VMEbus ecosystem; and bring more DC power onto each VMEbus card.
More details on this SIG will be released in the first quarter of 2002.
Further enhancements to VMEbus technology will be announced during 2002 and beyond.
The Tempe chip is expected to be available to all industry players through a 3rd-party reseller in the fourth quarter of 2002.
(This was Electronicstalk's Top Story on 24 January 2002)
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