Product category: Design and Development Software
News Release from: Mentor Graphics UK | Subject: Catapult C Synthesis
Edited by the Electronicstalk Editorial Team on 10 May 2005
Extensions offer powerful solution for
ESL design
Extensions to the Catapult C Synthesis algorithmic synthesis tool allow designers to rapidly explore architectural tradeoffs and simulate their designs 20x to 100x faster than traditional RTL.
Mentor Graphics has made a number of extensions to its Catapult C Synthesis algorithmic synthesis tool, a leading electronic system level (ESL) design tool These extensions enable the Catapult C Synthesis tool to automatically create SystemC transaction-level models and wrappers, allowing designers to rapidly explore architectural tradeoffs and simulate their designs 20x to 100x faster than traditional register transfer level (RTL) using verification environments that support SystemC, like Mentor's ModelSim
This article was originally published on Electronicstalk on 3 Jun 2004 at 8.00am (UK)
Related stories
New tool speeds Siemens code to RTL
Siemens ICN has reduced C source to RTL implementation time by 50% on a strategic project using the new Catapult C synthe