News Release from: Mentor Graphics UK
Subject: Inventra verification toolkits
Edited by the Electronicstalk Editorial Team on 12 September 2003

IP library gains verification toolkit

Mentor Graphics has joined Verisity's Pure IP programme and can now deliver verification toolkits based on Verisity's Specman Elite automated functional verification methodology for its IP.

Note: A free brochure or catalogue is available from Mentor Graphics UK on the products in this news release. Click here to request a copy.

Mentor Graphics and Verisity have formed a technology collaboration that will allow customers to quickly test Mentor Graphics Inventra intellectual property (IP) functionality and help ensure smooth integration of an IP core into a target design. Mentor Graphics has joined Verisity's Pure IP programme and can now deliver verification toolkits based on Verisity's Specman Elite automated functional verification methodology for its IP. The verification toolkit includes executable checkers and coverage scenarios that ensure correct IP integration.

The toolkits act as an invisible wrapper around the IP, allowing customers to automatically check for adherence to the rules and flag incorrect usage as well as measure the coverage of the IP interface.

The first core to be shipped with an e verification toolkit will be PCI Express.

"Customers are pushing for sophisticated verification components that ease the dual problems of performing comprehensive functional validation of an IP block and also providing capabilities to migrate to pre-silicon, SoC, system-level testing", said Michael Kaskowitz, General Manager of the Mentor Graphics Intellectual Property Division.

"The Pure IP programme will help us deliver a flexible verification toolkits to our customers".

Mentor Graphics has licensed the ability to deliver verification toolkits written in the e verification language to its customers.

The toolkits are based on Specman Elite and come in the form of an e Verification Component (eVC) or Invisible Specman, a special version of Specman Elite that is transparent to the end user.

The toolkits automatically check whether customers have correctly integrated the cores and measure coverage of core functions by system-level tests.

Mentor Graphics can now thoroughly verify its IP, then package that verification knowledge into a verification toolkit and ship the toolkit with the core.

Verisity's Pure IP programme eases the development, delivery and integration of IP.

The programme helps enable IP developers to thoroughly verify their IP prior to delivery, then package and transfer their knowledge of the IP and integration rules in an executable form through verification toolkits.

The toolkits are delivered with the cores and contain a bus functional model (BFM) and checking and coverage analysis capabilities to aid customers in integrating the IP into their system.

Customers using the toolkits can automatically check for correctness of the integration and measure the interface coverage between the IP and the system.

"Mentor Graphics consistently seeks ways to ease the verification and IP delivery process", said Steve Glaser, Vice President of Corporate Marketing and Business Development for Verisity.

"By joining our Pure IP programme, Mentor Graphics and its customers have access to a verification process automation technology for thoroughly verifying IP prior to and after delivery".

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