Product category: Design and Development Software
News Release from: Mentor Graphics UK | Subject: Calibre DRC files for UMC 90nm
Edited by the Electronicstalk Editorial Team on 24 February 2003
Design rule checking
spreads to finer geometries
Fully supported Calibre DRC (design rule check) rule files are now available for 90nm technologies from UMC
These 90nm rule files exploit the most advanced capabilities of Calibre, which has been UMC's standard for physical verification since 1998. "At the 90nm technology generation, it becomes increasingly important for our customers to seamlessly move from design to successful silicon due to the complexity of modern SoC designs", said Ken Liou, Division Director of the Design Support Division at UMC.
This article was originally published on Electronicstalk on 24 February 2003 at 8.00am (UK)
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"Calibre rule files, production-proven for five years at UMC, receive extensive qualification to smooth the transition from tape-out to manufacture, thus reducing cost and time to profit for our customers".
"The 90nm node will not only require expanded performance, capacity and accuracy from a physical verification tool, but also the flexibility to handle system-on-chip designs that incorporate analogue and digital IP of divergent design styles", said Joseph Sawicki, General Manager, Mentor Graphics design-to-silicon division.
"Calibre is ready now for the challenges of 90nm as well as next-generation technologies".
Further reading
Infineon and Chartered use litho-friendly design
Mentor Graphics has validated its Calibre LFD (litho-friendly design) results in silicon on 65nm process technology
Mixed-signal flow is proved with UWB transceiver
Mentor Graphics has set up a new reference flow for analogue and mixed-signal SoC designs
UMC is a valued partner of Mentor Graphics and is a member of Mentor's Design for Manufacture (DFM) Silicon Partners Programme.
This partnership guarantees mutual customers an extensive set of rule files for Calibre DRC, Calibre LVS (layout versus schematic) and Calibre xRC (parasitic extraction).
Rule files can be downloaded from UMC's website, dramatically reducing setup and development time for physical verification and reducing the chances of manufacturing errors.
Calibre is the industry's only complete physical verification and subwavelength solution.
The Calibre physical verification tool suite, which includes Calibre DRC and Calibre LVS, ensures that IC physical designs conform to manufacturing rules and match the intended functionality of the chip.
As the market leader in physical verification tools, Calibre is the industry standard, used in 19 of the world's 25 largest integrated device manufacturers, as well as all the top foundries and deep submicron library providers.
For subwavelength designs, Calibre leverages its hierarchical verification engine to provide a tool suite that adds, models and verifies layouts for all four RET techniques: optical and process correction (OPC); phase-shift mask (PSM); scattering bars (SB); and off-axis illumination (OAI).
New techniques, such as sub-100nm capable double-exposure dipole decomposition, are currently being refined for production deployment.
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