Product category: Design and Development Software
News Release from: Mentor Graphics UK | Subject: PSP for TM32
Edited by the Electronicstalk Editorial Team on 7 September 2001
Coverification support for
32bit media processor
Mentor Graphics has announced the availability of a coverification processor support package (PSP) for the TriMedia 32bit (TM32) media processor core
The PSP, integrated with Mentor Graphics Seamless Co-Verification Environment, will accelerate design schedules by enabling designers to validate hardware and software interfaces early in the design process within a virtual prototype, reducing time-consuming design iterations late in the design cycle.
This article was originally published on Electronicstalk on 7 September 2001 at 8.00am (UK)
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The PSP will enable developers working with TriMedia's media processor IP to rapidly bring to market a variety of advanced digital consumer applications, including set-top boxes, personal video recorders, digital televisions and videophones.
"Coverification is a critical part of maintaining our edge in the highly competitive advanced digital consumer appliance market and of further proliferating media processor IP", said Randy Smith, vice president of marketing and sales, TriMedia.
"By working with Mentor Graphics, our advanced media processor licensees will be able to use standardised modelling tools for coverification.
As the digital consumer market continues to expand, companies designing next generation communications products can increase their competitive advantage by deploying our media processing technology instead of lower-performing general purpose DSP technology.
Coverification lets them objectively evaluate the various options, which we're confident will result in increased selection of our technology".
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Mentor Graphics has validated its Calibre LFD (litho-friendly design) results in silicon on 65nm process technology
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Mentor Graphics has set up a new reference flow for analogue and mixed-signal SoC designs
Functional verification expands in scope
Platform addresses low-power verification and incorporates verification management capabilities that enable closed-loop management reporting, analysis and documentation
The processors based on the TriMedia SoC platform are designed to support a wide range of digital appliances requiring flexible performance, streaming media, and communications processing along with the ability to support applications such as Internet browsing and video e-mail.
Based on breakthroughs in very long instruction word (VLIW) technology, processors using TriMedia solutions achieve exceptional performance by executing more than five operations per clock cycle.
The TriMedia software development environment supports application development, performance tuning and optimisation entirely in C/C++ programming languages.
The PSP is based on TriMedia's existing instruction-set simulators, and interfaced to the Mentor Graphics Seamless CVE through an adapter layer.
The initial agreement model includes the TM32 PSP, with additional PSPs to be added as they become available from TriMedia.
The PSPs supported by Mentor Graphics have been verified against TriMedia's proprietary test suites to ensure accuracy.
The TM32 PSPs also support TriMedia's proprietary tools suite including the tmdbg, a source level GUI debugger for TriMedia processors.
The PSPs interface with popular logic simulation platforms, including Model Technology's ModelSim simulation product, and are compatible with the extensive library of PSPs already available from Mentor Graphics for use in multiprocessor systems.
For information on pricing and availability of the TM32 PSP visit the TriMedia website at www.trimedia.com.
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