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Product category: Design and Development Software
News Release from: LSI Europe | Subject: Core in I/O
Edited by the Electronicstalk Editorial Team on 4 July 2005

ASIC design methodology
optimises I/O placement

A novel design methodology provides flexible and optimised I/O placement in platform ASIC and cell-based ASIC/SoC designs by allowing core logic to be placed in the I/O regions

Taking the next evolutionary step in ASIC/SoC codesign technology, LSI Logic Corp has introduced Core in I/O methodology, which provides flexible and optimised I/O placement in platform ASIC and cell-based ASIC/SoC design by allowing core logic to be placed in the I/O regions. Following the company's Pad on I/O and flxI/O innovations, which allow for the placement of bond pads on top of active circuits in wirebond, and area arrayed signals in flip chip designs, respectively, the Core in I/O methodology delivers smart management of I/O assignment by unlocking the I/O ring to extend density advantages offered by these former technologies to optimise silicon area.

Designers can benefit by having maximum silicon area to place gates, memory and LSI Logic CoreWare intellectual property (IP) on-chip, resulting in the densest ASIC/SoC design solutions available today.

The proprietary technique challenges conventional wisdom of I/O or core-limited design constraints.

'The introduction of the Core in I/O methodology is an industry first for nanometre SoC designs'.

'LSI Logic's codesign technology provides IC designers with the industry's most cost-effective, densest design solutions that ensure optimal use of the silicon design area that's available today', said Stan Mihelcic, Director of Advanced Packaging and I/O Technology, Technology Marketing, LSI Logic.

'LSI Logic has created yet another innovative technology to allow SoC designers to take full advantage of the integration capabilities of Gflx and G90 platform ASIC and cell-based ASIC offerings'.

Core in I/O methodology is a proprietary codesign technology based around the company's popular FlexStream and RapidWorx design systems.

The scheme includes analysis of physical, electrical and interconnect constraints for I/O and package connection, enabling floor planning flexibility so designers can reduce routing and placement congestion.

Reduced interconnect between core and I/O circuitry can also be realised, improving overall electrical performance.

The improved floorplanning flexibility and design approach allows for a better design experience and more optimal, efficient design solutions.

Core in I/O methodology encompasses a methodology independent of I/O aspect ratios, enabling flexibility in the use of multiple I/O architectures and libraries.

As there is no compromise to silicon size, IC and CoreWare IP designers have more choices available to them.

Core in I/O technology has been optimised for low cost wirebond packaging solutions typically used in consumer, storage and office automation markets where cost effective ASIC/SoC solutions are required.

Core in I/O technology used in conjunction with LSI Logic's revolutionary Pad on I/O technology can provide significant reductions in die size when compared with conventional chip design solutions.

Core in I/O technology is available today for Gflx and G90 cell-based ASIC and platform ASIC design platforms.

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