Product category: Intellectual Property Cores
News Release from: LSI Europe | Subject: RapidChip
Edited by the Electronicstalk Editorial Team on 8 June 2004
ARM cores speed into
the ASIC Landing Zone
LSI Logic has two new high-performance industry-standard ARM processor cores available for integration into RapidChip platform ASIC designs using an innovative and unique Landing Zone region
The proven 200MHz ARM926EJ-S and 212MHz ARM966E-S cores are tightly integrated with LSI Logic's RapidWorx 2.0 design flow, dramatically reducing time to revenue for a broad range of applications including security, consumer electronics, industrial, instrumentation and imaging systems. Included in the LSI Logic predesigned and preverified RapidChip Integrator and RapidChip Xtreme family of "slices" are features known as Landing Zone regions, which allow processors to be implemented with significantly higher clock speeds than otherwise possible in the transistor fabric.
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In these regions, logic and memory resources are arranged so that a user can select an ARM926EJ-S microprocessor core running at 200MHz or an ARM966E-S running at 212MHz.
If an application does not use a processor in the Landing Zone region, the logic and memory elements are not wasted and may be used to implement user logic.
The Landing Zone regions on the RapidChip Integrator and RapidChip Xtreme slices further speeds time to market for designers when combined with LSI Logic's System CoreWare intellectual property, providing a complete solution for creating an SoC efficiently, predictably and rapidly.
Further reading
Platform ASIC speeds powerline comms IC to market
Spidcom Technologies has selected the LSI Logic RapidChip platform ASIC for use in its SPC200 powerline physical layer processor
"The new high-performance ARM cores are part of our RapidReady CoreWare library that meets specific LSI Logic standards for design integrity, ease-of-use, reusability and quality", said Ronnie Vasishta, Vice President, Technology Marketing, LSI Logic Corp.
"All deliverables integrate into our RapidWorx 2.0 design system so a customer's RapidChip Platform ASIC design process is streamlined, deterministic and low cost".
"This product announcement is consistent with the values of RapidChip; that is making complex design smooth, simple and available for a new class of Platform ASIC designers".
Through the combination of a streamlined design flow, rule-based methodology and automated, correct-by-construction tools, the RapidWorx design system enables fast, predictable design of high-performance, custom silicon.
The RapidWorx 2.0 design kit is available now for designers of RapidChip Platform ASICs to evaluate and use.
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