Innovation award for thermal analysis tool
FireBolt, the EDA industry's first full-chip thermal analysis tool, has won the EDN Innovation of the Year Award in the EDA (Verification and Analysis) category.
FireBolt, the EDA industry's first full-chip thermal analysis tool, has won the EDN Innovation of the Year Award in the EDA (Verification and Analysis) category.
Rajit Chandra, Gradient's founder, President and CEO, accepted the award on Gradient's behalf at the16th annual EDN Innovation Awards ceremony in San Francisco last week.
EDN magazine editors, readers and an editorial advisory board selected FireBolt from a field of hundreds of innovations in recognition of its ability to give integrated circuit (IC) designers a highly accurate 3D temperature map of the billions of objects in an IC, throughout the design process - from silicon virtual prototyping to final signoff - with realistic run times.
The constant temperature assumption used in mixed-signal design does not provide enough detail to predict the potential functional failures in final silicon that may be caused by parametric failures in circuits sensitive to temperature and temperature gradients.
The EDA industry needs a new temperature-aware design approach to estimate and predict thermal behaviour early in the design process.
With FireBolt, designers can integrate the IC design; chip, package and ambient temperature conditions; and an understanding of the detailed temperature on individual devices and wires to predict the true performance and reliability of a design throughout the design process and in its final environment.
Using this approach during the design stage allows designers to make the changes necessary to correct temperature gradients, thus preventing devastating impact on chip performance, reliability, cost, and project schedule.
Never before have designers had access to detailed full-chip temperature information.
"We are pleased at this honour from the EDA industry and EDN magazine and at the growing recognition of the need for temperature-aware design", said Chandra.
"Until now, designers have had to assume either that temperature was constant across a chip or that power hotspots were also temperature hotspots".
"This award is part of the continuing recognition that temperature gradients - and the ability to pinpoint all areas where gradients are high - impact chip timing, power and signal integrity".
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