Product category: Intellectual Property Cores
News Release from: GDA Technologies
Edited by the Electronicstalk Editorial Team on 18 May 2004
Ethernet MAC IP cores speed to inSilica
GDA Technologies has licensed its 10Gbit (XGEMAC) and 1Gbit (GEMAC) Ethernet MAC IP cores to inSilica, a leading supplier of customer specific SoC solutions
The XGEMAC is industry's first UNH-IOL compliance validated 10 Gigabit Ethernet MAC IP core targeting LAN, MAN, WAN switches and routers, traffic aggregators, multiplexers and test equipments applications. inSilica will be incorporating the XGEMAC IP core into its next generation communication products.
This article was originally published on Electronicstalk on 18 May 2004 at 8.00am (UK)
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'GDA is highly regarded as an innovator and developer of high-speed interconnect Intellectual Property cores', said Anant Agrawal, President and CEO of inSilica.
'Combined with the rich-featured and highly flexible system validated XGEMAC IP core, the XGEMAC gives us full confidence that our products will be in compliance with the IEEE802.3ae specifications and allows us get to the market quickly'.
'GDA is reshaping the IP landscape by offering system validated solutions, and service enable IP model to accelerate our customers' products to market while reducing their development risks and cost', said AG Karunakaran, President of GDA Technologies.
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'inSilica's decision to license our solutions is an excellent endorsement for our IP model and we are excited to be working with them on their new generation of SoC products'.
The XGEMAC adheres to the IEEE802.3ae standard and is available for both ASIC and FPGA implementations.
Its simple, configurable and modular architecture is independent of application logic, PHY designs, implementation tools and most importantly target technologies.
The XGEMAC provides XGMII interface to the line side and a flexible backend interface to the user logic on the system side.
The XGEMAC has an extensive set of filtering capabilities based on source, destination, unicast, multicast, and broadcast addresses as well as being VLAN aware.
The optional FIFO module supports configurable depths and watermarks with a variety of control options to support lossless flow control.
The core also provides rate matching for OC-192 PHY components and a full set of statistics counters to support SNMP/RMON.
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