Product category: Intellectual Property Cores
News Release from: Elixent
Edited by the Electronicstalk Editorial Team on 28 January 2003

Pair work on
reconfigurable platform SoCs

Elixent is working with Toshiba to jointly develop a platform SoC that integrates Elixent's D-Fabrix reconfigurable algorithm processing array with Toshiba's MeP configurable processor core

Elixent has entered into an agreement with Toshiba to jointly develop a platform SoC that integrates Elixent's D-Fabrix reconfigurable algorithm processing array with Toshiba's MeP configurable processor core. This SoC will be used as a reconfigurable evaluation and development platform by both companies.

The D-Fabrix array will be used to accelerate algorithm processing and provide dynamic reconfigurability within the platform.

The resulting platform SoC will be useful for the implementation of a broad range of consumer applications, combining the benefits of Toshiba's MeP processor and Elixent's reconfigurable technology.

With rapidly rising mask set costs being incurred due to the move to 90 and 65nm, a different technique is essential for cost-effective production.

Elixent's reconfigurable technology will help semiconductor companies maintain their lead on the cutting edge processes needed to manufacture SoCs at these new geometries.

"We evaluated many solutions before choosing Elixent", said Dr Furuyama, General Manager of Toshiba's SoC Research and Development Centre.

"D-Fabrix is the reconfigurable algorithm processor that will well fit with Toshiba's MeP platform and thus will efficiently provide various benefits".

The combination of dynamic reconfiguration and changing the algorithm processing architecture on-the-fly under the control of Toshiba's MeP processor delivers substantial savings in cost and power.

It produces a completely programmable device with performance exceeding that of the fastest DSPs.

"We are convinced that this technology will trigger substantial change in the industry", commented Kenn Lamb, Elixent's CEO.

"From the earliest development of D-Fabrix, starting over six years ago at HP Labs, it was apparent that the potential cost, speed and power consumption benefits would make it a winning solution", he continued.

"This announcement shows how right we were and we are very excited about this agreement with Toshiba".

Elixent's D-Fabrix RAP platform implements algorithms in "virtual hardware", allowing the creation of a hardware accelerator for every algorithm in a system.

By virtue of reconfigurability, it can implement multiple hardware accelerators in the same silicon area, giving high silicon utilisation.

Further, this reconfigurability allows functionality to be added or changed post-fabrication, allowing bugs to be fixed, new functions to be added, or even the whole chip to be customised.

It achieves this by mapping algorithms to a fine-grained processing array made up of ALUs, registers and memories, giving it a unique ability to adapt to any algorithm or datapath width.

This provides the flexibility of a software solution with the performance of a hardwired ASIC.

Through dynamic reconfiguration Elixent's D-Fabrix array allows for a high degree of silicon reuse, leading to lower device cost.

In benchmarks against standard DSP processors, D-Fabrix provides 10x the performance in less silicon area - and with greatly reduced power consumption.

Additionally, D-Fabrix enables a new class of platform devices that can be truly multifunctional - supporting multiple applications, and adapting efficiently to changing specifications.

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