Celoxica in Elixent alliance: News from Elixent

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Celoxica and Elixent have entered a technology alliance to allow direct targeting of Elixent's reconfigurable signal processing (RSP) architecture from C-based algorithms. The two companies are developing a version of Celoxica's DK1 design suite to enable SoC designers to bypass the need to use hardware description languages (HDLs). This will avoid the risk and time penalties associated with recoding of algorithms from C into HDL and the subsequent verification process.

By targeting Elixent's embedded reconfigurable arithmetic logic unit (ALU) array, DK1 will enable SoC developers to take algorithms from Handel-C to silicon implementation without the need to learn complex, inefficient HDLs.

Final SoC designs will also be upgradeable in the field, providing developers with the fastest and most flexible route for incorporating optimised signal processing algorithms into new designs.

This is important for the next generation of consumer, imaging and communications products.

"This partnership will expand DK1 application to SoCs, in addition to FPGAs", commented Denis Nye, senior VP, worldwide sales and marketing at Celoxica.

"We can now target high-performance, embedded DSP applications which are a key requirement in next generation consumer products".

"This is the first step in providing system designers with the ability to implement optimised DSP algorithms in high volume consumer SoCs without first consulting a HDL manual", commented Kenn Lamb, Elixent's CEO.

"Software tools are the cornerstone to making Elixent's technology easily accessible.

Our alliance with Celoxica is a significant step, offering C-based access to RSP, reconfigurable signal processing".

A version of DK1 incorporating a direct Handel-C to Elixent's RSP architecture conversion is scheduled for the second half of 2002.

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