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Compiler automates SystemC synthesis

A Celoxica product story
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Edited by the Electronicstalk editorial team Jun 9, 2004

The Agility compiler synthesises SystemC directly to high-density FPGA and programmable SoC logic and generates RTL VHDL and Verilog for SoC design.

The Agility compiler synthesises SystemC directly to high-density FPGA and programmable SoC logic and generates RTL VHDL and Verilog for SoC design.

The Agility compiler takes in SystemC and outputs optimised EDIF netlists for high-density programmable logic devices from Actel, Altera Corp and Xilinx.