Product category: Intellectual Property Cores
News Release from: CebaTech | Subject: GZIP family
Edited by the Electronicstalk Editorial Team on 15 May 2007
Cores secure storage SoC designs
IP cores provides comprehensive standards-based lossless data compression for use in storage and data networking ASICs and FPGAs
New from CebaTech, the GZIP family of CebaIP cores provides comprehensive standards-based lossless data compression for use in storage and data networking ASICs and FPGAs. Integrating the GZIP family of IP cores onto storage and data networking integrated circuits (ICs) can greatly reduce the operational costs of storing and transmitting data by end users of these ICs.
Related stories
IP cores join online chip design community
CebaTech has joined the Chip Estimate Prime IP Partner programme
Modular IP cores for FPGAs and ASICs
The CebaIP Platform is a modular approach to offering IP cores that allows design engineers to integrate functions quickly into AICs of FPGAs
Designers can choose from a number of available configurations to meet their desired speed, compression efficiency, and area requirements.
The GZIP family of cores is based on CebaTech's integrated CebaIP Platform.
The CebaIP platform provides a modular approach to offering IP cores, enabling design engineers to quickly and easily integrate each configuration into their ASICs or FPGAs.
Using the CebaIP Platform's integrated advanced direct memory access (DMA) controller with the OpenBSD software driver, designers are able to rapidly achieve complete compression, decompression, and encryption offload solutions.
The GZIP family is standards-based and conforms to the popular 'deflate' standard as specified in RFC1951.
Further reading
Compiler technology complements HyperTransport
CebaTech has joined the HyperTransport Technology Consortium
Compiler generates RTL from untimed ANSI C
C-to-RTL compiler works efficiently on large, complex designs at a high level of abstraction and then automates the process of creating high-performance hardware solutions
C-to-RTL compiler technology explained
CebaTech will participate in the Xilinx ESL for FPGA Training Forum on 6th November 2006 at the Hilton Hotel, San Jose, California
File formats for both ZLIB and GZIP, as specified in RFC1950 and 1952, are also supported.
Datarates range from 2 to 8Gbit/s, and typical compression ratios for benchmark files sets are in the range of 2.5:1 to 3.5:1.
The GZIP family also includes optional advanced encryption standard (AES) capability with select cipher modes for securing 'data at rest' inside the enterprise.
AES datarates range from 3 to 12Gbit/s.
Supported cipher modes include ECB, CBC, GCM, and XTS with key sizes of 128, 192 and 512bit.
(XTS is the latest recommendation by the IEEE in the P1619 standard for encryption of storage devices).
'With the exponential growth of stored data inside the enterprise, the desire to protect this data has never been greater', says Chad Spackman, President of CebaTech.
'The GZIP family of CebaIP cores with AES cryptography is the perfect blend of high speed hardware-based compression technology to reduce the operational costs of storing and transmitting data, and to secure this data from potential enterprise-wide threats'.
CebaTech expects the GZIP family to be attractive to companies building embedded networking and storage processors for a wide array of appliances, disk controllers, and storage backup systems.
The GZIP family is the first offering of CebaIP core configurations based on CebaTech's CebaIP Platfrom.
'Customers can choose from available GZIP configurations now, and grow with the platform over time to greater levels of integration and function, to meet the changing demands of their respective markets', says Spackman.
GZIP-based compression and decompression is available now for customer engaugements, with general availability of the AES function in mid-2007.
Pricing for single-use licences start at US $150,000.
Future configurations of the CebaIP Platform that include partial TPC/IP, VLAN, link aggregation, and large send offload (LSO) will be released later in 2007.
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