Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: Cadence Encounter
Edited by the Electronicstalk Editorial Team on 11 September 2007
IC platform cuts design times
Cadence's new approach directly models critical elements of the manufacturing process instead of relying on conservative design rules.
Cadence Design Systems has released a set of design products and capabilities for faster production of digital system-on-chip (SoC) designs Cadence will exhibit its 45nm design flows to semiconductor designers and design at the CDNLive! Silicon Valley user conference
This article was originally published on Electronicstalk on 15 Apr 2004 at 8.00am (UK)
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"At aggressive geometries, traditional design flows no longer provide accurate predictability, forcing designers to either guardband their designs excessively, or risk manufacturability problems", said Mike McAweeney, Vice President of DFM Marketing at Cadence.
"By modelling key manufacturing processes within the implementation flow and optimising early, we're reducing overall design time and improving designers' confidence that the chip will wo