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News Release from: Cadence Design Systems
Subject: Virtuoso
Edited by the Electronicstalk Editorial Team on 13 July 2004

Enhanced platform accelerates custom IC design

Improvements to the Virtuoso custom design platform bring significantly greater speed and productivity to analogue, custom and RF design.

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Improvements to the Virtuoso custom design platform bring significantly greater speed and productivity to analogue, custom and RF design. Higher levels of integration and optimisation to the simulation and layout technology of the platform bring new muscle that enable engineering teams to more quickly deliver accurate mixed analogue and digital designs - the core of today's wireless and communication products. These latest enhancements underscore the ongoing Cadence commitment to equip designers with the industry's most comprehensive environment for rapid, full-chip, silicon-accurate design and verification for analogue/digital blocks to complete SoCs.

"These improvements to the Virtuoso platform give semiconductor manufacturers new capabilities to move sophisticated mixed-signal designs more quickly into production", said Felicia James, General Manager and Vice President of the Custom IC Business Unit at Cadence.

"We will continue to aggressively roll out new productivity boosting technology that keeps the Virtuoso platform at the forefront of solutions for mixed-signal design".

With the platform's new capabilities and tighter simulation integration, semiconductor companies can achieve greater productivity and intellectual property (IP) reusability across multiple design teams and methodologies to reduce chip simulation time from weeks to days.

Users of the cosimulation technology can easily scale up their mixed analogue and digital simulation capacity and performance while keeping their familiar use model.

New multimode simulator integration lets designers carry out full-chip verification on complex SoCs quickly and accurately.

Intelligent simulation technology allows generous analogue/digital sandwiching without having to modify the design hierarchy.

Designers no longer need to rework libraries and create new symbols or views when switching between the platform's simulators.

"When used in conjunction with the Cadence Substrate Noise Analyst tools, the flexibility, speed and precision delivered by the Ultrasim mixed-mode simulator will enable more complex substrate analysis work than other simulators that Cypress evaluated", said Joseph Stenger, Senior Staff Design Engineer in Wireless Design, Cypress Semiconductor.

Layout productivity additions boost the performance and capability of the Virtuoso platform.

A new graphical environment for quick and easy creation of parameterised cells and an extension for customisation of advanced QCells seamlessly work with more common PCell libraries.

Designers can now hand over the manual tasks of their jobs to a computer while retaining complete control and mastery of the layout itself.

A new optimise/migrate feature speeds migration of IP.

For larger designs, Cadence's new Virtuoso Layout Migrate technology enables significant time savings when migrating designs from process to process.

This allows customers to keep and maintain their valuable IP while selecting the most economical way to manufacture it.

Virtuoso custom design platform technologies are available on HP, Sun, IBM and Linux platforms, and operating system support varies by product.

The platform also includes enhanced versions of all existing custom technologies operating on OpenAccess and Cadence design databases.

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