News Release from: Cadence Design Systems
Edited by the Electronicstalk Editorial Team on 28 April 2003
Incisive support for latest FPGAs
Cadence Design Systems has unveiled the next step in its alliance with Xilinx, with complete support for the new Spartan-3 platform FPGAs.
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Cadence Design Systems has unveiled the next step in its alliance with Xilinx, with complete support for the new Spartan-3 platform FPGAs. The Cadence Incisive verification platform and chip-package-board solutions optimise the design chain link between Xilinx and its customers by enabling the rapid design, verification, and PCB implementation of the Spartan-3 platform. In addition, Cadence solutions were used throughout the Xilinx design process to deliver the industry's first 90nm FPGA.
"Utilising the Incisive verification platform and advanced silicon design technologies from Cadence, we were able to develop our new 90nm Spartan-3 platform FPGAs", said Rich Burnley, Director of IC Design and CAD at Xilinx.
"The tools and support from Cadence helped us deliver the first 90nm product in the programmable logic industry".
"We continue to strengthen our alliance with Xilinx by providing solutions that speed their time to market for high-density devices like the Spartan-3, and by shortening their customer's design-in time, which improves time-to-volume for both companies", said Rahul Razdan, Corporate Vice President and General Manager, Systems Verification group at Cadence.
"Our Incisive platform provides complete support for the Spartan-3 platform and clearly addresses the verification requirements for this new class of FPGAs.
For the first time, customers will be able to verify complex FPGAs with a unified verification methodology, improving speed and efficiency".
According to Dave Wurthmann, Director of Systems Verification at Xelic, "Creating a complex reusable testbench and doing streamlined, thorough verification is critical for getting products out on time.
The combination of Xilinx FPGAs and Cadence technologies allows us to deliver an effective solution that meets the tight market window of our networking customers.
With this advanced FPGA verification flow we can design-in an FPGA, and then an ASIC - without changing tools".
Functionally verifying nanometre-scale ICs requires optimal speed and efficiency.
The Cadence Incisive verification platform is the world's first single-kernel verification platform that supports a unified methodology from system design to system design-in for all design domains.
It delivers 100x full-chip performance throughout the entire design cycle and can compress total verification time by up to 50%.
Today's complex, high-speed systems are being designed with Cadence design solutions that consider the chip, the package and the printed circuit board (PCB).
Cadence's solutions help semiconductor companies like Xilinx optimise the design chain link to their customers by providing tools and services that minimise system design-in time and shorten both companies' time-to-volume.
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