Verification package gains watermark capability

Beach Solutions will launch Version 3.2 of its Easi-Studio at DAC 2004 (Booth 1538) as well as demonstrating its recently announced Easi Developer Suite.

Beach Solutions will launch Version 3.2 of its Easi-Studio at DAC 2004 (Booth 1538) as well as demonstrating its recently announced Easi Developer Suite.

New features incorporated in Easi-Studio version 3.2 will include the "watermarking" of design data as reliable once they have been checked and validated so that design file generation can proceed with confidence.

Watermarking will also prevent the duplication of checking processes when the data are up to date and valid.

Also featured in Easi-Studio version 3.2 are usability improvements including a new memory map editor that configures register address positions through a simple drag and drop operation.

Easi-Studio is deployed today at several major independent device manufacturers in Europe and the USA to eliminate the risks associated with the manual interpretation of SoC specifications.

By using Easi-Studio to automate the creation of hardware and software design files ("embedded applications system interfaces" - EASI's) and their associated documentation, a design project team can ensure that all developers work with up-to-date and consistent design data.

Files created consist of interface code required for hardware design, software API's and verification.

Standard generators are available for VHDL, Verilog, SystemVerilog, C, C++ and e.

Documentation for the SoC is also produced in formats compatible with MSWord, Framemaker and HTML.

Thus, Easi-Studio greatly reduces the risks of introducing design errors that are typically only discovered late-on during the hardware/software integration phase of critical SoC product developments.

Easi-Studio is based around a 3rd-generation XML schema technology specifically created for the needs of IP developers and embedded systems integrators.

Easi Developer Suite (EDS) is a powerful environment that allows users to rapidly customise two key parts of Easi-Studio, interface rule checks (IRCs) and Easi generators.

EDS can be used to modify existing generators to suit design styles and flows as well as create completely new generators to meet their own specific design requirements.

EDS also provides users with the ability to define the rules and rule sets that will be applied to validate the correctness of block and system level design interfaces.

These IRCs can be applied throughout the SoC development flow to identify errors.

Running IRCs early, minimises the risk of error propagation through the design flow and significantly reduces the costly verification task otherwise required to identify them.

EDS provides the mechanism to extend the rule checking capabilities within Easi-Studio by giving users the ability to ensure that data saved about the system conforms to company, project and industry standards and that the flow of data through the design tool chain remains robust.

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