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Product category: Design and Development Software
News Release from: Aldec | Subject: Active-HDL 6.3
Edited by the Electronicstalk Editorial Team on 18 November 2004
Interface streamlines FPGA design flow
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Aldec and Magma Design Automation have completed the design flow interface between Active-HDL 6.3 and Palace version 2.4.
Aldec and Magma Design Automation have completed the design flow interface between Active-HDL 6.3 and Palace version 2.4 The integration of the two products automates the data exchange of graphical design capture, mixed VHDL and Verilog verification and physical synthesis providing an efficient, easy-to use solution for Actel, Altera and Xilinx designs