TSMC adopts dynamic power integrity solution: News from Apache Design Solutions

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Taiwan semiconductor manufacturing Company (TSMC) has incorporated Apache's RedHawk with PowerGate technology for the verification of advanced low power and leakage control designs in its Reference Flow 6.0. RedHawk, the dynamic power integrity solution for TSMC's Reference Flow 5.0, has been expanded to include the verification of designs using power-gating (MTCMOS - multiple threshold CMOS) and multiple voltage islands. In addition, TSMC adds Apache's hierarchical memory and IP modelling with spatial and temporal properties.

'Apache provided the first dynamic voltage drop methodology for SoC and I/O-package power integrity in Reference Flow 5.0'.

'Low-power management and leakage control continue to be key design issues at 90nm and 65nm technologies', said Ed Wan, Senior Director of Design Service Marketing for TSMC.

'In Reference Flow 6.0, we've expanded RedHawk and PowerGate technologies to create the power management flow for designs using power-gating and multiple voltage islands, as well as temporal modelling for SoC memories'.

Leakage power management is one of the major design challenges for semiconductor devices at 90nm and below.

Advanced design techniques such as power-gating minimise leakage current by controlling the supply voltage to portions of the design.

For accurate verification of off-state, ramp-up/ramp-down, and on-state sequences, RedHawk with PowerGate technology delivers a full-chip dynamic power integrity solution that can correctly model the nonlinear behaviour of header/footer switches over a wide voltage range.

By providing feedback on off-state leakage and impact of ramp-up on timing, RedHawk enables designers to gain better understanding of the chip's behaviour prior to tape-out.

In addition, RedHawk supports dynamic voltage drop analysis of designs using multiple voltage islands.

With memories and other IPs occupying more than half of the silicon area, the dynamic power behaviour of these blocks have become a critical factor to the overall SoC performance.

Apache's RedHawk provides hierarchical modelling with nonuniform spatial and temporal distribution of the current inside of the memory and custom IP block, for improved accuracy, performance, and ease of use.

'TSMC's leading process technologies have been driving the industry's most advanced flow requirements and we are pleased to see RedHawk continue as a key component of the TSMC Reference Flow', said Andrew Yang, CEO of Apache.

'The ongoing collaboration between Apache and TSMC benefits our mutual customers and allows us to address their power integrity issues and increase yields'.

The TSMC Reference Flow 6.0 for advanced low power management and hierarchical dynamic memory modelling is available from TSMC online, or through any TSMC account manager.

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TSMC adopts dynamic power integrity solution

TSMC has incorporated Apache's RedHawk with PowerGate technology for the verification of advanced low power and leakage control designs in its Reference Flow 6.0.