Product category: Programmable Logic Devices
News Release from: Altera Europe | Subject: Stratix III FPGAs
Edited by the Electronicstalk Editorial Team on 07 May 2008
FPGAs support serial gigabit interface
Stratix III FPGAs are the industry's first programmable logic devices able to support Gigabit Ethernet SGMII on LVDS pins.
Altera's Stratix III FPGAs now support Serial Gigabit Media Independent Interface (SGMII) on its LVDS I/Os Offering interface speeds of 1.25Gbit/s and meeting SGMII's stringent jitter performance requirements, Stratix III LVDS I/Os support triple-speed Ethernet (10/100/1000Mbit/s) interfaces without transceivers
This article was originally published on Electronicstalk on 17 Jul 2007 at 8.00am (UK)
Related stories
FPGAs speed DDR3 memory adoption
Stratix III FPGAs support DDR3 with a maximum clock speed of 400MHz and maximum datarate of 800Mbit/s.
Low-cost FPGA family available in production
Built on TSMC's 65nm low-power process, the Cyclone III family includes devices that are qualified for commercial, industrial and extended temperatures.
Budget FPGAs enable speedy storage appliance
Texas Memory Systems (TMS) has used multiple Altera Cyclone FPGAs to enable the breakthrough performance of its RamSan-320 data storage appliance.
Stratix III FPGAs are the industry's first programmable logic devices able to support Gigabit Ethernet SGMII on LVDS pins, offering lower costs, lower power and more interfaces per device.
The SGMII I/Os featured in Stratix III FPGAs allow the device to connect to Gigabit Ethernet ports through small form-factor pluggable (SFP) optical modules.
Using Stratix III FPGA's LVDS channels, customers can integrate a large number of Gigabit Ethernet channels in high-port-count applications, such as 96-port SGMII switches.
"Stratix III FPGAs were designed to deliver tremendous value to customers with an unmatched combination of low power, high performance and high density", says David Greenfield, Senior Director of Product Marketing, High-End Products, at Altera Corporation.
"The high datarate speeds and low jitter performance offered by Stratix III FPGA's LVDS I/Os provide wireline applications a cost-effective SGMII Gigabit Ethernet interface".
Stratix III FPGA LVDS channels support Gigabit Ethernet SGMII as a result of the architecture's low jitter performance, dynamic phase aligner (DPA) and soft clock-data recovery (CDR) mode.
Soft-CDR, which is implemented in the programmable fabric as IP, supports SGMII by extracting the clock out of the clock-embedded data.
Altera's Stratix III FPGAs, offering Gigabit Ethernet SGMII connectivity on its LVDS I/Os, are available now.
The Altera website includes a demonstration video showing how to build a 96-port SGMII Gigabit Ethernet with Stratix III FPGAs.
• Altera Europe: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page