Product category: Programmable Logic Devices
News Release from: Altera Europe | Subject: DSP Builder version 5.1
Edited by the Electronicstalk Editorial Team on 23 December 2005
Simulation capability for DSP designers
Altera is offering a simulation capability for digital signal processing (DSP) designers with the release of DSP Builder version 5.1
Version 5.1 of the DSP Builder development tool enables designers to simulate an imported HDL design within The MathWorks Simulink environment, claimed to be a first for model-based design. Using this capability, designers of high-speed digital applications can reduce their development time by combining their own HDL-based designs with existing Simulink and DSP Builder models.
This article was originally published on Electronicstalk on 23 December 2005 at 8.00am (UK)
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'An important ingredient of model-based design is the ability to simulate systems with HDL-based blocks'.
'Altera has created a platform for high-speed DSP development on FPGAs that can shorten the verification process', said Ken Karnofsky, Marketing Director, Signal Processing and Communications at The MathWorks.
'DSP Builder allowed us to reduce development time by at least four months for our CT scanner product', said Jason Katcha, Senior Engineer, GE Healthcare.
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'Using DSP Builder's HDL import feature, we performed highly accurate system simulations with VHDL control-in-the-loop'.
'DSP Builder allowed us to quickly create and optimise our control and we particularly liked the graphical user interface, multiple clock domains, and bus-width optimisation capability'.
DSP Builder allows engineers to reduce the DSP design cycle by creating a hardware representation of a DSP design in an 'algorithm-friendly' environment.
Version 5.1 enables designers to incorporate multiple HDL modules or Quartus II software design projects simultaneously, generating an individual simulation model for each one.
This allows designers to simulate the HDL modules with a standard Simulink/DSP Builder-based model in the same design environment.
In addition, the tool makes it possible to reuse existing designs, which is critical for simulating large control logic or complex state machine subsystems together with DSP Builder's DSP data path'.
'DSP Builder version 5.1, along with our existing DSP IP portfolio, helps our customers optimise high-performance DSP designs and reduce development time'.
'At the same time, by fully leveraging the native simulation capability of Simulink, this latest version provides designers with a comprehensive system design flow for demanding DSP applications', said Justin Cowling, Altera's Director of IP and Technology Marketing.
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