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Product category: Reference Designs
News Release from: Altera Europe | Subject: Video-over-IP reference design
Edited by the Electronicstalk Editorial Team on 23 March 2005

Design puts FPGAs to work on video over IP

Altera Corp has unveiled the industry's first FPGA-based, video-over-IP reference design.

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Altera Corp has unveiled the industry's first FPGA-based, video-over-IP reference design. By leveraging the programmability and flexibility of Altera's low-cost Cyclone FPGA series and Nios II embedded processor, system designers can use this new reference design to accelerate their development of cost-effective, low complexity systems in the emerging video-over-IP market. 'Altera's comprehensive, first-to-market video-over-IP solution provides us with a significant competitive advantage, and we have adopted it and their Ethernet-to-ASI solution for our next-generation digital head-end product', said Yu Zhi Wu, Project Manager of Pro Broadband 'The low-cost Cyclone FPGAs, combined with the flexible Nios II processor and Altera's considerable expertise in broadcast solutions, enables us to reduce our costs via elimination of an ASSP and shorten our design cycle'.

Video-over-IP is a digital technology for transporting video over Internet protocol (IP)-based networks.

The Altera reference design, which designers can use with any Altera FPGA device, targets applications for broadcast head-end and audio/video delivery systems.

In addition to broadcast infrastructure, the design is applicable to any situation where high speed transport of data over Ethernet is required, including production studio, content distribution, video conferencing, security surveillance and medical imaging.

'By being the first to market with a FPGA video-over-IP reference design, Altera solidifies its position as a top-tier supplier of leading-edge solutions for entertainment content creation, management and delivery', said Todd Scott, Senior Director of Altera's Broadcast and Consumer Business Unit.

'Our ability to quickly develop the design provides our customers with significant market leverage as they proceed into new product design and production'.

The Altera video-over-IP reference design is part of a suite of technical solutions that showcase Altera's comprehensive support for the broadcast industry's rapid progression towards digital and high-definition broadcasting.

Altera's reference design, which leverages the company's broadcast expertise in serial digital interface (SDI) and asynchronous serial interface (ASI) technologies, is an extension of this commitment.

The Altera reference design can accept a configurable number of MPEG-2 transport streams and encapsulate the data for transmission over Ethernet.

It can also regenerate a configurable number of transport streams using encapsulated data received from Ethernet.

The Altera reference design includes a hardware engine for performing user datagram protocol (UDP) and optional real-time transport protocol (RTP) encapsulation of the video data, thus allowing full gigabit line rate to be achieved.

The design also includes the Nios II processor and driver software for the industry-standard BSD IP stack running under the eCos real time operating system (RTOS).

Software running on the Nios II processor is used to manage the network connection, initiate multicast sessions and provide operational statistics.

A web-based GUI is provided for easy user interaction.

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