Product category: Intellectual Property Cores
News Release from: Altera Europe | Subject: Nios II
Edited by the Electronicstalk Editorial Team on 9 March 2005
Embedded core gains
multiprocessor debug support
Altera Corp and Lauterbach have announced immediate multiprocessor debug support for Altera's Nios II soft-core embedded processor
Related stories
Embedded processor runs automotive RTOS
Automotive designers can now leverage the flexibility of an FPGA-based embedded processor with the knowledge that they will meet the specifications set by Europe's top automotive manufacturers
Coprocessor module built using FPGA
High performance bus to supply additional processing power to Intel Xeon processor-based servers is based on the power of a coprocessor module built using a Stratix III FPGA
Software engineers can now take advantage of a robust software environment tailored to debugging multiple Nios II processors in an Altera FPGA or Hardcopy series structured ASIC. By implementing multiple soft-core processors in a single FPGA, system designers can achieve a high level of performance with the flexibility to adapt to a dynamic design environment.
'Altera leads the industry in delivering soft-core processor technology to a wide user base, so extending our debugger to support Nios II multiprocessor systems was an easy decision for us', said Norbert Weiss, Manager of International Sales at Lauterbach.
'With Nios II processors, the high-performance Avalon switch fabric, and the SOPC Builder system integration tool, Altera has created a very powerful and easy-to-use solution for creating multiprocessor systems on a programmable chip'.
'We view our debugger as being a natural complement to this technology'.
The Lauterbach multiprocessor debug solution enables the display and control of multiple Nios II processors in the FPGA.
Each Nios II processor can be logically grouped and synchronised, responding to start, step, and break commands simultaneously.
Further reading
System reduces design times for Harris
An Altera MegaCore has optimised Harris' engineering team's productivity and allowed great flexibility in its video router
DSP product shrinks from eight boards to one
An audio-systems specialist has used FPGAs to shrink an eight-board, 64 DSP device-based design to a single, Stratix FPGA-based PCI card
Ethernet core passes interoperability tests
Passing of IEEE 802.3 compliance and interoperability tests allows an Ethernet core to be integrated with embedded processors to build control and data plane applications
Single-chip camera/image processor built with FPGA
Single-chip camera and image processor is based on an embedded processor integrated with smart image sensors
Additionally, cross-breakpoint awareness enables a user to halt the system when a set of processors have all reached their assigned breakpoints.
The solution relies on Lauterbach's Trace32-PowerView debugger software to provide a unified, graphical environment for debugging one or more Nios II processors.
Meanwhile, Lauterbach's Trace32-PowerDebug hardware debug module gives designers a simple hardware connection to their system, operating over a single JTAG connection to the Altera device.
External, time-stamped trace capture is also provided over a high-speed Mictor connector to the Nios II system, providing users 512Mbyte of capture depth at 300MHz.
'Lauterbach's introduction of Nios II multicore debugging support on their Trace32-PowerDebug is another indication of the market momentum behind the Nios II soft-core processor family', said Chris Balough, Director of Software and Nios Marketing at Altera.
'Altera has shipped more than 14,000 development kits around the world to embedded processor customers who are increasingly using multiple Nios cores in their designs, and the introduction of the Lauterbach tool will give them the ability to a accelerate their software development'.
The Lauterbach Trace32-PowerView and Trace32-PowerDebug are available immediately from Lauterbach.
The Nios II processor is available royalty-free, with a perpetual shipper's licence, from Altera as part of development kits featuring the Cyclone and Stratix series of FPGAs.
A downloadable evaluation version of the Nios II processor and development tools (including compiler, debugger, and software libraries) is available from the Altera website.
• Altera Europe: contact details and other news
• Email this news to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Related Business News
Cast Selects Avery Design Systems For...
...Pci Express Verification Ip. Semiconductor intellectual property provider CAST, Inc. today announced that it has begun using the PCI-Xactor test environment from Avery Design Systems to verify its current and future PCI Express IP cores.
Vsia Announces Release Of Qip Metric...
...Now Publicly Available With Hard Ip Extension. The VSI Alliance , the leading IP standards body for the electronics industry, today announced the Quality IP Metric version 3.0, which includes the hard IP extension, is now publicly available.
Gda Technologies Selected By Renesas Technology...
...For Pci Express To Amba Axi Bridge. Gda Technologies, Inc., a fast growing supplier of Intellectual Property and Electronic Design Services , today announced that Renesas Technology Corp., a leading semiconductor company, has selected GDA for development of a PCIE 2 AMBA AXI Bridge to be
Atmel Licenses ARM1176JZF-S Processor
Rousset, France (ots/PRNewswire) - - Extends Atmel's Roadmap of Upwards-Compatible ARM Technology-Based on 32-bit Microcontrollers From the ARM7 Family Through to the ARM9 and ARM11 Families Atmel(R) Corporation (Nasdaq: ATML) announced ...
ots: Atmel Licenses ARM1176JZF-S Processor
Börsennachrichten und aktuelle Meldungen aus Wirtschaft und Finanzen. Marktberichte und News zu Investmentbanking und Fonds - Börsennachrichten bei Stock World.
Search the Pro-Talk network of sites
