News Release from: Altera Europe
Subject: Stratix II
Edited by the Electronicstalk Editorial Team on 7 April 2004
New benchmarks promote FPGA performance
New benchmark results claim the Stratix II FPGA family as the industry's performance leader, outperforming Virtex-II Pro by an average of 50%.
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New benchmark results clearly establish the Stratix II FPGA family as the industry's performance leader, outperforming Virtex-II Pro by an average of 50%. Delivering increased performance has become significantly more challenging at the 90nm process node due to the need to balance increased power consumption against higher performance design targets. As a result, the only practical way to dramatically elevate FPGA performance while transitioning to 90nm is to develop a new performance-optimised logic structure, such as the adaptive logic module (ALM) in Stratix II devices.
When customers are involved in the definition of a product, great products emerge.
Density, features, cost, and performance were defined for both the Stratix and Stratix II architectures through 6 months of customer interaction during the product-planning phase for each product family.
"Our customers are our secret weapon", said Erik Cleage, Senior Vice President of Marketing at Altera.
"Getting them involved at the definition stage is a key reason that we were able to develop these stellar products".
The benchmarks described below validate the success of this strategy.
The benchmark analysis was performed using a suite of approximately 75 customer designs synthesised using Synplify 7.5.0 from Synplicity coupled into Altera Quartus II version 4.0 and Xilinx ISE version 6.2 place-and-route software.
Results were generated using both "least-effort" and "best-effort" settings in the development tools representing novice and expert users.
This benchmark analysis demonstrates that the new 90nm Stratix II family outperforms Virtex-II Pro FPGAs by 70% on average with the "least-effort" settings.
In the "best-effort" setting, results show a Stratix II performance advantage of 50% on average, documenting clear leadership in this high-performance segment of the market.
This same analysis between the original Stratix FPGAs and Virtex-II Pro devices in the "best-effort" settings showed a small performance for advantage for Stratix FPGAs.
In the "least-effort" settings, Stratix devices outperformed Virtex-II Pro devices by 43% on average.
The objective of this analysis was to establish a repeatable benchmarking methodology representing best practices for optimising design performance.
Details on the methods used for this benchmark analysis and specific recommendations on establishing customer benchmarks will be discussed in a net seminar on 8th April 2004.
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