Product category: Intellectual Property Cores
News Release from: Actel Europe | Subject: AES, DES and 3DES cores
Edited by the Electronicstalk Editorial Team on 27 November 2002
Secure FPGAs gain security core IP
Actel has new Advanced Encryption Standard and Data Encryption Standard IP cores for its nonvolatile Axcelerator, ProASIC, ProASIC Plus, RTSX-S and SX-A FPGA architectures.
Furthering its commitment to offer secure solutions to the marketplace, Actel has released new Advanced Encryption Standard (AES) and Data Encryption Standard (DES) intellectual property (IP) cores optimised for the company's nonvolatile Axcelerator, ProASIC, ProASIC Plus, RTSX-S and SX-A field-programmable gate array (FPGA) architectures Through Actel and its partners, Amphion Semiconductor, and Helion Technology, customers now have access to design services and a range of encryption cores certified by the National Institute of Standards and Technology (NIST) that support AES, DES and triple DES (3DES) algorithms
This article was originally published on Electronicstalk