Product category: Programmable Logic Devices
News Release from: Actel Europe | Subject: ProASIC and ProASIC Plus
Edited by the Electronicstalk Editorial Team on 24 September 2002
Speedy debug for Flash-based FPGAs
First Silicon Solutions has developed a Configurable Logic Analyzer Module (CLAM) system for real-time logic analysis of designs using Actel's Flash-based ProASIC and ProASIC Plus FPGAs
In addition to the traditional internal on-chip option, FS2's CLAM system also offers unique off-chip trace and triggering support, which allows users to reduce the time required to debug and optimise the system while minimising the use of system gate resources and available device pins. Embedded in the Actel device, the CLAM system enables users to more easily test and debug their Flash-based logic designs for ASIC alternative applications in the industrial, communications, networking and avionics markets.
This article was originally published on Electronicstalk on 24 September 2002 at 8.00am (UK)
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The CLAM system consists of FS2's On-Chip Instrumentation (OCI) intellectual property, a hardware probe for communications with the FPGA target, and Windows-based control and display software.
The CLAM system IP is configurable with trigger and trace resources, offering a large number of options, including configuration for either on-chip or off-chip trace and triggering.
The solution allows the user to select up to 128 internal nodes for analysis at compile time.
During run-time, the user is able to view trace and specify trigger conditions on up to 32 channels, or nodes.
The CLAM system software makes it easy to set up and configure trace and trigger conditions and view the trace display of the output logic waveforms.
Actel's ProASIC family, consisting of the ProASIC 500K and ProASIC Plus solutions, ranges in size from 75,000 to 1-million system gates.
The combination of a fine-grained, ASIC-like architecture and nonvolatile flash configuration memory makes Actelûs ProASIC and ProASIC Plus offerings strong ASIC alternatives.
The devices are live at power up, highly secure and require no separate configuration memory, all characteristics shared by ASICs.
The ProASIC architecture and design methodology support popular FPGA and ASIC tool flows, reducing time to market and permitting designers to migrate easily between FPGA and ASIC solutions.
The FS2 CLAM System is now available from FS2.
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