Product category: Recruitment, Reports and Resources
News Release from: Accellera
Edited by the Electronicstalk Editorial Team on 10 June 2003
Standards for language-based design
verification
Accellera has approved four new standards for language-based design verification.
Accellera has approved four new standards for language-based design verification The new Accellera standards include Property Specification Language (PSL) 1.01, Standard Co-Emulation Application Programming Interface (SCE-API) 1.0, SystemVerilog 3.1 and Verilog-AMS 2.1
This article was originally published on Electronicstalk on 8 Nov 2004 at 8.00am (UK)
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Accellera's standards improve the way designers will design electronic circuits and systems in the 21st century.
"Today's announcement is an exciting milestone for Accellera and system-level verifica